This article presents a summary of our recent research of 3 memory and storage companies, and tackles a couple of fundamental questions: How quickly will memory capacity shortage get resolved? How long will the investment thesis last?
Click on company names to see the details:
- SK Hynix, the HBM leader (+6/10)
- Micron, Western company with DRAM, NAND, and HBM together (+8/10)
- SanDisk, the NAND pure-play (+7/10)
- Western Digital/Seagate - the downstream storage names, outside the chip layer.
The short answer, worked out in full below: none of the three memory-chip pure-plays scored the same way, and the reasons turn out to be a test of capital structure and contract strategy.
Memory / storage basics
- NAND flash is permanent storage: SSDs and USB drives. This is SanDisk’s core business. It keeps data saved even when the power is off.
- DRAM (Dynamic Random Access Memory) is a memory chip that gives devices its short-term memory. Used in servers, PCs, and phones to run programs
- HBM (High Bandwidth Memory), the component driving pricing is DRAM stacked into layers and placed close to an AI processor so data can move between them at much higher speed. HBM chips are built from the same underlying DRAM manufacturing process, just packaged differently and are using several times more manufacturing capacity (and cost) per chip. So when factories shift capacity to making HBM to service demand from AI accelerators, there’s less capacity left to make regular DRAM.
- Wafer is a thin slice of silicon that chips get built onto. A blank wafer goes through etching, doping, layering to build the memory-cell circuitry. HBM then requires additional steps that DRAM doesn’t: the wafer gets thinned, vertical holes are drilled through it, and multiple finished DRAM layers are then stacked on top of each other and bonded together, with a logic die to manage the stack.
- Fab (fabrication plant)’s real constraint is throughput, fixed monthly capacity to run wafers through its equipment. Every fab has a ceiling on how many wafers it can push through its full process in a given month.
- HBM eats a disproportionate share of that fixed capacity, because of the extra steps and the stacking of multiple DRAM for one HBM chip effectively uses several standard DRAM dies’ worth of production for a single finished HBM unit.
“HBM3e consumes approximately three times the wafer capacity of standard DDR5 to produce an equivalent amount of bits. HBM4, which enters volume production this year, worsens that ratio to 4:1” (Ben Bajarin — CEO and Principal Analyst at Creative Strategies).
Three companies (Samsung, SK Hynix, and Micron) account for 95% of global DRAM production and are reallocating capacity toward HBM because it’s dramatically more profitable per wafer; and as a result driving the DRAM pricing surge. Not NAND, which has a more fragmented competitive field including SanDisk, Kioxia, and others.
The scale of the repricing is extraordinary
DRAM prices rose ~90–95% quarter-over-quarter entering 2026;
Samsung’s Q1 2026 disclosure showed blended DRAM/NAND average selling prices up 146% versus the full-year 2025 average;
Goldman Sachs projects Samsung’s traditional DRAM ASP will rise 326% year-on-year in 2026 alone.
DRAM pricing is on track to rise 275–300% from 2025 through 2027 — more than three times the ~90% increase seen in the 2017–18 memory supercycle, at roughly triple the revenue base (Ben Bajarin, Creative Strategies).
Numbers shown are midpoints of TrendForce’s ranges.
Sources: TrendForce, “Tight DRAM Supply to Boost DDR5 Contract Prices” (Oct 29, 2025); TrendForce, “Memory Price Outlook for 1Q26 Sharply Upgraded” (Feb 2, 2026); 2Q26 figure via Ampheo Blog, citing TrendForce (accessed 2026); 3Q26 forecast (13-18% DRAM) via BRITECITY, “IT Hardware Price Increases 2026: Mid-Year Update,” citing TrendForce (Jul 22, 2026).
The Core Problem, in One Chart
IDC’s 2026 forecast puts DRAM supply growth at 16% year-on-year and NAND at 17%, both below the 20-30% range IDC itself calls the historical norm for the post-2018 memory market.
The gap: demand tied to AI is growing far faster than supply can, and most of the new supply that does arrive is going to a different product entirely.
IDC’s framing: “This is a zero-sum game: every wafer allocated to an HBM stack for an Nvidia GPU is a wafer denied to the LPDDR5X module of a mid-range smartphone or the SSD of a consumer laptop.”
Source: IDC, “Global Memory Shortage Crisis: Market Analysis and the Potential Impact on the Smartphone and PC Markets in 2026,” IDC Blog (idc.com/resource-center/blog). The 25% “historical norm” bar is the midpoint of IDC’s own stated 20-30% range, not a separate data point.
Why Supply Can’t Just Catch Up
It’s timing.
Building a fab takes years, and every company in this buildout is moving as fast as it can. SEMI, the semiconductor industry’s trade association said in June 29, 2026 press release that worldwide 300mm ("300mm" refers to the diameter of the silicon wafer, based on which all cutting-edge memory production is run today) memory capacity will reach 4.1 million wafers per month in 2026 and 4.2 million in 2027 — a net increase of only about 100,000 wafers per month, or roughly 2.4% YoY, despite tens of billions of dollars in new investment.
This is because so much of the industry’s engineering effort and clean-room space is going into converting existing capacity to HBM, which consumes three to four times the wafer input of ordinary DRAM for the same gigabyte of output, rather than adding net new capacity for conventional memory.
Source: SEMI, “SEMI Projects 300mm Memory Equipment Investment to Surpass $50 Billion in 2026” (PR Newswire, Jun 29, 2026), quoting SEMI President Ajit Manocha.
What’s Actually Being Built: Timeline and Scale by Facility
The table below pulls together every confirmed fab commitment found across SK Hynix, Samsung, and Micron, with the specific capacity or milestone each is targeting and when.
Sources: The Elec, Seoul Economic Daily, SemiWiki, StorageReview, BigGo Finance, Korea Times, and Ben Bajarin/Creative Strategies — individual citations available on request. Dates for facilities still under construction are company- or government-stated targets, not independently confirmed completions.
What Each Company Is Spending
The dollar figures behind that table deserve their own summary.
Samsung’s quarterly earnings calls confirm this spending is already landing, not just announced: Q2 2026 Device Solutions (semiconductor) capex alone was 15.4 trillion won (~$11B) for that quarter, with management stating on the call that capex would see a “significant increase” through the rest of the year as Pyeongtaek deployment continues.
Why the Math Doesn’t Add Up to Fast Relief
Put the two sections above side by side and a genuine tension shows up. Individual companies are each describing capacity additions in the tens to hundreds of thousands of wafers per month — Samsung’s P4 alone is targeting over 200,000 wafers/month of new 1c DRAM capacity by the end of 2026.
But SEMI’s own industry-wide total shows worldwide 300mm memory capacity growing by only about 100,000 wafers per month across 2026-to-2027.
Those two facts are not strictly contradictory: some of the individual additions are conversions of existing capacity rather than pure net-new wafers, and HBM’s own higher wafer cost per gigabyte eats into the effective output even where headline wafer counts rise — but the gap between “here is what each company says it’s building” and “here is how little total industry capacity actually grows” is itself the clearest evidence for why this shortage doesn’t resolve quickly, even with unprecedented money behind it.
That is the reason behind SK Hynix’s warning that the shortage could last past 2030: the industry is spending record sums and building confirmed new fabs, but the physical timeline of construction plus the wafer-cost penalty of HBM production means the earliest meaningful new capacity lands around mid-2027, a second wave arrives in 2028-2029, and full normalization may not arrive until sometime after that.
This synthesizes publicly reported figures from IDC, SEMI, Samsung, SK Hynix, Micron, and South Korean government sources, gathered via web research. It is for informational purposes only and does not constitute investment advice. All data is subject to revision.
What the Timeline Means for Each Thesis
The timelines aren’t just industry context, for three of these four companies, it’s their supply chain.
SK Hynix’s M15X fab: its ramp to full capacity by mid-2027 is simultaneously part of the industry-wide relief, and the date to watch for when SK Hynix’s current pricing advantage might start to soften.
Micron’s answer takes a different form: its 16 Strategic Customer Agreements lock in roughly $100 billion of revenue through 2030 specifically so that its own revenue visibility outlasts the capacity-relief timeline, regardless of when new supply arrives.
SanDisk’s position is the least certain of the three, because NAND doesn’t share DRAM’s direct HBM-cannibalization mechanism. Its own New Business Model contracts, covering roughly two-thirds of FY2028 bits, are a bet that NAND tightness persists on a similar timeline to DRAM, but the underlying cause (shared fab equipment and engineering talent, not direct AI wafer consumption) is a distinct question worth separating from the DRAM story.
Western Digital and Seagate sit outside this timeline question almost entirely — as downstream storage-systems companies rather than chip makers, their thesis depends more on whether AI datacenter capex broadly continues.
The downstream consequences are visible
Dell COO Jeff Clarke called the shortage “unprecedented” on a November earnings call, telling Bloomberg he’d “never seen memory-chip costs rise this fast.”
Dell raised list prices 15–20% starting mid-December 2025, implemented a further ~17% increase on March 30, 2026, and has since warned commercial customers of increases up to 30% more, with quote validity on server configs collapsing from 30 days down to 7–14 days.
Lenovo told customers in December 2025 that all existing quotes would expire January 1, 2026, citing the shortage directly, and has since begun pulling some entry-level configurations entirely because “the BOM math no longer works.”
Lenovo’s CFO, Winston Cheng, disclosed the company is holding component inventory close to 50% above normal levels specifically to buy insurance against this shortage — a concrete hedge, not just a warning.
HP CEO Enrique Lores initially said the company had enough inventory to cover the first half of its fiscal year, but warned rising costs would hit margins starting in May, and separately cautioned that H2 2026 could be “especially tough.” HP now puts memory’s share of a typical laptop’s build cost at roughly 35%, up from a historical 15–18% — the exact figure and the exact “up from” comparison used in the original line, now directly attributed to HP itself rather than a general industry estimate.
ASUS’s Director of Technical Marketing, Sascha Krohn, cautioned against expecting sudden shocks at the retail level, since price increases move through “procurement, assembly, distribution, and retail” in stages: “It’s not going to be a sudden shock, but it’s going to be a bit more steady... I do expect memory prices to go up, and that is definitely something that nobody’s really looking forward to… except for memory vendors.”
On the smartphone side, Samsung and LG are described as “rethinking 2026 product plans, particularly around AI PCs and tablets,” and a Korean PC-industry representative told Chosun Biz that companies “have no choice but to respond by postponing releases or redesigning products rather than lowering margins”.
Open AI: In Oct 2025 OpenAI’s Stargate project signed letters of intent with Samsung and SK Hynix for 900,000 DRAM wafer starts per month, against total global DRAM capacity of roughly 2.2–2.3 million wafer starts/month at the time ~40% of supply, a target from a non-binding agreement. By April 2026 the Stargate expansion that justified the agreements was scrapped. One known consequence, Micron shuttered Crucial, its 29-year-old consumer memory brand, in December 2025, redirecting Micron’s wafer allocation toward enterprise and data center customers.
One tension: even NAND (used in SSDs, not directly competing with HBM for the same wafer capacity the way DRAM does) is being swept into the same pricing surge — because NAND fabs compete with DRAM/HBM fabs for the same limited pool of semiconductor capital equipment, clean-room capacity, and skilled engineering talent, not because NAND itself feeds AI accelerators directly.
The Mechanism, in One Line
Samsung, SK Hynix, and Micron control the overwhelming majority of global DRAM production, and all three have been reallocating wafer capacity toward HBM, the stacked memory AI accelerators need. Producing HBM consumes several times the wafer capacity of standard DDR5, so every wafer redirected to HBM is one that does not make the conventional memory going into an ordinary server, laptop, or phone. That reallocation, not a shortage of total fab output, is the direct cause of the pricing surge running through every name here.
The Scorecard
The Same Shortage, Three Different Cash-Flow Outcomes
Given the relief is years away rather than months, how each company's capital structure holds up during the wait matters as much as the shortage itself — and here, riding the identical HBM/DRAM reallocation produces three different cash-flow outcomes.
- SanDisk’s capital-light model — a long-running NAND manufacturing joint venture with Kioxia — keeps its capex-to-revenue ratio at just 0.9%, against a peer average above 13%. That structure produced the group’s highest free cash flow yield relative to how it grew (4.8%) without SanDisk needing to fund its own fabs outright.
- Micron is the opposite case: capex running at 28% of revenue — more than triple the peer average — funding the fab investment behind its own accelerating growth. That capital intensity is precisely why free cash flow yield scored a neutral 0 in the Micron report despite the strongest revenue growth print of the three (167%, and accelerating each quarter) — not a weaker business, but one reinvesting harder into the same cycle.
- SK Hynix sits in between on paper but ends up on top by outcome: an 8.6% free cash flow yield — the highest of the group — even while running its own heavy capex program (roughly 19% of revenue) for the Cheongju and Yongin fab expansions. Its HBM-heavy mix is profitable enough to throw off cash even mid-build, a different position than either of the other two.
Both Sides of the Contract Bet
SanDisk and Micron have each moved to lock in demand years in advance, rather than ride the traditional boom-bust memory cycle: SanDisk has signed New Business Model agreements with eight customers worth a reported $93.9 billion in minimum contracted revenue, covering roughly half of FY2027 output and two-thirds of FY2028; Micron has 16 Strategic Customer Agreements locking in about $100 billion of minimum contracted revenue through 2030, backed by $22 billion in cash deposits from customers.
Both moves are explicitly designed to make the current cycle less cyclical — turning a commodity, price-swing business into something closer to contracted, infrastructure-like revenue. Whether that succeeds is the open question hanging over both stocks once new industry capacity eventually does arrive; for now, it’s the clearest sign either company is planning for this cycle to end at some point, even while pricing suggests otherwise today.
The Gap Worth Naming
None of the four pieces in this set covers Samsung. Samsung, SK Hynix, and Micron are the only three companies globally with DRAM, NAND, and HBM exposure together. Samsung is, by most measures, the largest of the three. Its absence from this series reflects the practical difficulty of covering a Korean conglomerate with a complex share structure using the same framework built for US-listed names.
Where This Leaves the Series
So, directly: the shortage does not resolve quickly. Partial relief arrives around mid-2027 as the first wave of new fabs, including SK Hynix's M15X, reaches capacity. A second wave lands in 2028-2029; and SK Hynix's own warning puts full normalisation possibly past 2030.
How long the investment thesis lasts depends less on that industry clock than on what each company has built around it:
- Micron's contracts are specifically designed to keep working regardless
- SK Hynix's advantage fades on the same timeline it's helping build: its M15X fab ramping to full capacity is both part of the industry's relief and the point where its own pricing edge likely starts to soften.
- SanDisk's bet is different in kind, not just degree: NAND doesn't share DRAM's direct HBM-cannibalization mechanism, so whether its tightness resolves on a similar schedule is a separate question that deserves its own answer, not an assumption borrowed from the DRAM story.
This article is for informational purposes only and does not constitute investment advice.